International Workshop On The Growing Problems with Scalable, Heterogeneous Infrastructures - ISPA'12
International Workshop on the Growing Problems with Scalable Heterogeneous Infrastructures - ISPA'12
The International Workshop on the Growing Problems with Scalable Heterogeneous Infrastructures (GSHI'12) will be held at the 10th IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA2012).
- Where is the feasible end of scalability, i.e. when does it not make sense to increase scale anymore?
- Which application and problem class can actually benefit from the degree of scale and scalability model is most suited for them?
- What are the specific problems faced on hardware and software side in order to increase the scale further, i.e. such as interconnect latency, Amdahl’s law etc.
- What alternative approaches are thinkable
Call for papers:
With the successful implementation of petaflop computing back in 2008, manufacturers strive to tackling the next barrier: exaflop computing. However, this figure is generally misleading, as the peak performance of a machine is basically just calculated by the number and performance of each individual processing unit in the system – even the sustained performance tests through LINPACK essentially just stresses the mathematical units and not the interconnects between nodes. In other words, modern performance measurements essentially reflect the size of the system and not so much the efficiency to solve a specific class of problems. With the introduction of multi- and manycore processors, the scale of modern systems increases drastically, even though their effective frequency remains basically unchanged. It is therefore generally predicted that we reach exaflop computing by the end of this decade.
Given the circumstances, the question arises whether it is worth reaching the exaflop mark in the first instance, for other than research interest: already only few applications can actually exploit the scale of existing infrastructures, let alone handle the scale of an exaflop machine if this means scale, rather than clock rate. We can distinguish in particular between embarrassingly parallel applications which benefit from the number of resources but have little requirements towards their interconnects and tightly coupled applications that are highly restricted by the interconnect limitations – and the number of embarrassingly parallel applications, as well as their resource need, is typically limited itself. Problems that would really benefit from the scale in order to improve accuracy and speed of calculation also frequently expose an exponential resource need, or at least a growth by the power of n. This means that in order to reach an efficiency increment, it needs an exponential number of additional resources, i.e. a linear growth in the number of resources does not offer the increment in efficiency required.
Yet manufacturers stills struggle with essential problems on both hard- and software side to increase the efficiency of larger scale systems at all: in particular the limited scalability of the interconnect, memory etc. poses issues that reduce the effective performance of larger scales rather than increase it. Promising approaches employ a mix of different scalability and consistency models which however restrict the usage domain accordingly - in particular multi-level applications exploit such hybrid models, but their development is still difficult and very rarely supported.
This workshop focuses on the particular problems to increase scale and examines potential means to address these problems. It is thereby not restricted to the hardware side of problems, but addresses the full scope from hardware limitations over algorithm and computing theory to new means for application development and execution. The workshop aims at experts from all fields related to high performance computing, including manufacturers, system designers, compiler and operating system developers, application programmers and users etc. Depending on the number of submissions, this workshop will be broken into multiple strands according to topic, such as hardware, theory of computation and software development.
Topics:
- Hardware restrictions
- New hardware approaches, such as 3d memory
- Software restrictions
- Application classifications and their system needs
- Use case domains and their resource to performance ratio
- New approaches in programming
- Tools for development of large scale parallel applications
- Automated parallelisation
- New ways to exploit parallelism and concurrency
- New application structures
- Execution infrastructures
- Communication protocols
- Alternatives to parallelism
- Alternative computing paradigms
- Power Management
Paper Submission:
Submissions should not exceed 8 pages in IEEE CS proceedings paper format, including tables and figures. All paper submissions must represent original and unpublished work. Submission of a paper should be regarded as an undertaking that, should the paper be accepted, at least one of the authors will register for the conference and present the work.
Submissions will be conducted electronically using EasyChair: http://www.easychair.org/conferences/?conf=ispa2012
Please select track "International Workshop On The Growing Problems with Scalable Heterogeneous Infrastructures"
Place:
Leganés, Madrid, Spain
(Universidad Carlos III de Madrid)
Program:
10-13 July 2012
Organization:
- Workshop Chairs:
- Daniel Rubio Bonilla - High Performance Computing Center in Stuttgart, Germany
- Lutz Schubert - High Performance Computing Center in Stuttgart, Germany
- Program Committee:
- Rui Aguiar - IT Aveiro, Portugal
- Christiaan Baaij - University of Twente, Netherlands
- Manuel Carro - Technical University of Madrid, Spain
- Tommaso Cucinotta - Bell Labs, Ireland
- Aake Edlund - Royal Institute of Technology, Sweden
- Marisol García Valls - Charles III University of Madrid, Spain
- Roberto Giorgi - University of Siena, Italy
- Vincent Gramoli - École Polytechnique Fédérale de Lausanne, Switzerland
- Jan Kuper - University of Twente, Netherlands
- Juri Lelli - Scuola Superiore Sant'Anna, Italy
- Bruno Santos - IT Aveiro, Portugal
- Domenico Talia - University of Calabria, Italy
- Stefan Wesner - High Performance Computing Center in Stuttgart, Germany
- Javad Zarrin - IT Aveiro, Portugal
Dates:
- Paper Submission: February 15 March 1, 2012
- Author Notification: March 15, 2012
- Camera ready contributions: April 15, 2012
Contact:
Daniel Rubio Bonilla [rubio (at) hlrs . de]