Polca - Programming Large Scale Heterogeneous Infrastructures

2013-06-11T11:19:50+00:00

Polca (Programming Large Scale Heterogeneous Infrastructures) is a project proposal, pending of aproval, submitted to call 10 of ICT-2013-3.4, “Advanced Computing, embedded and Control Systems” as an approach to bring together High Performance and Embedded Computing.

MyThos - Operating System for Many Threads

2013-05-21T10:37:00+00:00

MyThos (modular Operating System for Massively Threaded applications) is a BMBF (German Ministry of Education and Research) funded project included in the call for initiatives to further increase scale and performance of industrially relevant applications for the purpose of full commercial exploitation of HPC systems.

The JUNIPER EU project is started

2013-05-27T13:32:07+00:00

JUNIPER (Java Platform for High Performance and Large Scale Real-Time Data) is a STREP project of the FP7 programme of the EU. The aim of the project is to conduct research on innovative technology for supporting Real-Time Big Data applications.

LLVM 3.3 new features

2013-05-27T06:38:32+00:00

Next week will be released the version 3.3 of LLVM and CLANG infrastructure and it includes new exciting features.

Next generations consoles to use hybrid architectures with unified memory space.

2013-05-27T05:35:49+00:00

The next generation of high performing gaming consoles, the PlayStation 4 and Xbox One, will both use a hybrid architecture using a semi-custom SoC design based on AMD's modules.

AMD, Intel and Nvidia present new accelerators in SC12

2012-11-14T14:38:15+00:00

Advanced Micro Devices (AMD), Intel and Nvidia have presented their new compute accelerators cards for high-performance computing (HPC) at the SuperComputing Conference & Exhibition (SC12), taking place in Salt Lake City (USA).

The new products deliver better theoretical performance compared to previous generation without increasing the energy consumption. To achieve this the level of parallelism (internal computing cores) is greatly increased.

Adapteva 4096-Core Processor

2012-03-22T08:19:23+00:00

Adapteva has announced that is developing a new multicore architecture with up to 4,096 RISC processing cores on a single die.

The company claims that the chip will be achieving a performance efficiency of 70 GFlops per watt. The flagship processor would produce more than five TFlops in double precision at 700 Mhz.

Programming features for a parallel world

2012-03-01T22:00:00+00:00

Programming models have evolved over decades to for single-core, single-processor machines. Support for distributed and even parallel execution of code is not an intrinsic feature to most current programming languages and instead have to be painstakingly added and handled by the developer.

Intel published a set of features that new programming models will need to address - find the full article on HPCWire.

Details on IBM's Blue Gene Q available

2012-03-02T11:58:49+00:00

More and more information about the latest Blue Gene/Q(TM) (BGQ) series of supercomputers by IBM is becoming available. Capitalizing on the experience gained by building the two earlier generations of supercomputers (the Blue Gene/L(TM) and Blue Gene/P(TM) series), in the BlueGene/Q series IBM has put together a number of innovations that promise to realize unprecedented performance, scalability, reliability and at the same time energy efficiency.

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